What's PizziOS?
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    PizziOS is a small 386+ OS designed principally for speed. It is written in 100% assembly, although software and possibly some drivers may be written in C, if that proves feasible. PizziOS runs off a segmented memory model. It will not be a UNIX as UNIX has proven to be as much of a bandwagon as Windows. At present I do not plan to support multiple users.

    With this OS I'm revisiting an old memory management scheme used in some old UNIX implementations, intended to eliminate memory fragmentation on both the physical and linear address spaces. That is, to move all memory down when a block of memory is freed to fill the hole that is left.

    Some systems have attempted this by keeping relocation information present in the memory after loading all programs, and relocating each program that is above the memory block that was freed, then to do a rep movsd equivalent to move the data down to the new blocks. Needless to say, this consumed a lot of resources.

    With memory segmentation, this type of overhead is not required. Each program can be virtually relocated by patching its LDT and GDT segment entries, thus making the same addresses access different locations in the linear address space since all memory accesses are relative accesses from a segment base address.

    I do not plan to support paging. I do not need paging for its memory protection features the way Windows and most x86 Unix implementations do, as protection can be achieved using segmentation instead. I do not need paging for virtual memory, as I do not plan to support global virtual memory. I feel that virtual memory is a waste of resources and that applications can swap their own large arrays internally when appropriate. The popular virtual memory scheme was designed when hard disks had the capacity that ram has today and ram had the capacity that CPU cache has today. I think we have the capacity to go back to ram for programs.

    Not supporting paging has several advantages. First, the ram used for the page tables and for the virtual memory procedures (which cannot be swapped) is freed for general purpose use. Secondly, the Translation Lookaside Buffer does not have to be flushed after every task switch (several times per second). Avoiding TLB flushes on task switches allows the chip to use its cache to its full extent, as it never can do in Windows, Linux and any Unix implementations that use flat memory models.

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Copyright 2000, Ed Pizzi